Brigham Young University Homepage

Digital Communications: A Discrete-Time Approach
by Michael Rice

M-ary Phase Shift Keying (MPSK)

Introduction

M-ary Phase Shift Keying -- or MPSK -- is a modulation where data bits select one of M phase shifted versions of the carrier to transmit the data. Thus, the M possible waveforms all have the same amplitude and frequency but different phases. The signal constellations consist of M equally spaced points on a circle. In this exercise, you will design an 8-PSK detector to process the data contained in the file psk8data.mat

Textbook References

M-ary QAM: Section 5.3, discrete-time realizations: Section 5.3.2, partial response pulse shapes: Section A.2.

Specifications

normalized sample rate: 8 samples/symbol
normalized carrier frequency: 0.25 cycles/sample
carrier phase: 0 degrees
average energy: 9
pulse shape: SRRC (50% excess bandwidth, span = 12 symbols)
symbol clock offset: 0
input file psk8data.mat
input message length: 357 symbols (1071 bits or 153 ASCII characters)

Preliminary Design

Design the Detector

Design the detector, shown below, using blocks from the Simulink, DSP System, and Communications System Toolboxes.



Test the Detector Design

You should test the detector you designed by constructing a modulator to produce a test signal. The following procedure steps you through this design process:
  1. Design the modulator shown below to meet the above specifications except make the input the four symbol sequence 3 1 4 1 5.




  2. Connect the output of your modulator to the input of your detector.

  3. Connect the output of your detector to a To Workspace block (be sure to open the Properties Dialog Window and set the Save format to matrix) and a Scope block.

  4. Set the simulation parameters as follows:

    Simulation Time
    Start time: 0.0     Stop time: (12+5)*8-1
    Solver selection
    Type: Fixed-step     Solver: discrete (no continuous states)

    Note: the stop time is computed as follows: 12 = 2*(span/2) [the delay of the pulse shaping filter plus the delay of the matched filter]; 5 = the number of data symbols; 8 = the number of samples/symbol. We subtract because the start time is t = 0.0.

  5. Run the simulation and plot the demodulator input and the matched filter output on the same set of axes. The simulation produces 19 downsampled matched filter outputs -- the last 5 correspond to the sequence (3 1 4 1 5). Check the values in the workspace to see if they agree with input sequence (3 1 4 1 5).

  6. Examine the output of the Downsample block to see if the downsample operation is keeping the desired samples. Adjust the sample offset of the Downsample block to obtain the proper values.

Exercise

  1. Replace the modulator blocks with the From File block and set the Filename to psk8data.mat and the sample time to 1.

  2. Set the simulation parameters as follows:

    Simulation Time
    Start time: 0.0     Stop time: (12+357)*8-1
    Solver selection
    Type: Fixed-step     Solver: discrete (no continuous states)

  3. Run the simulation.

  4. The detector produces 369 symbol estimates. The last 357 of these correspond to 153 7-bit ASCII characters. Determine the message using either your Matlab script or an ASCII Table.

  5. Plot the eye diagram and signal space projections.
Brigham Young University - Provo | Fulton College of Engineering | The Church of Jesus Christ of Latter-day Saints
Department of Electrical and Computer Engineering, BYU, Provo, UT 84602 - (801)422-4012 - Copyright 2009. All Rights Reserved